[PATCH] D102474: AArch64: support atomic load/store in GISel

[Tim Northover via Phabricator via llvm-commits]

t.p.northover created this revision.
t.p.northover added reviewers: paquette, aemerson.
Herald added subscribers: danielkiss, jfb, hiraditya, kristof.beyls, mcrosier.
t.p.northover requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Because of how GISel works, we can end up with atomic `G_[SZ]EXTLOAD` instructions, which have no patterns because they don't exist SDAG side.

In theory monotonic and unordered variants of these could use the normal instructions for better addressing modes, but I didn't manage to convince the GISel to select them (the mapping from SDAG to GISel nodes is wonky enough around loads and stores without adding atomicity). So this patch mostly tells GISel to lower the extending loads to plain ones.


https://reviews.llvm.org/D102474

Files:
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll

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