[llvm] 43a7f13 - [X86] AMD Zen 3: same-reg AVX YMM VXORPD is a zero-cycle(!) dep-breaking zero-idiom
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Fri May 14 01:56:55 PDT 2021
Author: Roman Lebedev
Date: 2021-05-14T11:56:07+03:00
New Revision: 43a7f130a7440f2c5eaa30faf69b90e2a9c571a0
URL: https://github.com/llvm/llvm-project/commit/43a7f130a7440f2c5eaa30faf69b90e2a9c571a0
DIFF: https://github.com/llvm/llvm-project/commit/43a7f130a7440f2c5eaa30faf69b90e2a9c571a0.diff
LOG: [X86] AMD Zen 3: same-reg AVX YMM VXORPD is a zero-cycle(!) dep-breaking zero-idiom
As confirmed by exegesis measurements, and ref docs.
Added:
Modified:
llvm/lib/Target/X86/X86ScheduleZnver3.td
llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-ymm.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver3.td b/llvm/lib/Target/X86/X86ScheduleZnver3.td
index 63537a4410b0..0116163ec354 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver3.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver3.td
@@ -1541,7 +1541,7 @@ def Zn3WriteFZeroIdiomY : SchedWriteVariant<[
SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [Zn3WriteZeroLatency]>,
SchedVar<NoSchedPred, [WriteFLogicY]>
]>;
-def : InstRW<[Zn3WriteFZeroIdiomY], (instrs VXORPSYrr)>;
+def : InstRW<[Zn3WriteFZeroIdiomY], (instrs VXORPSYrr, VXORPDYrr)>;
def : IsZeroIdiomFunction<[
// GPR Zero-idioms.
@@ -1557,7 +1557,7 @@ def : IsZeroIdiomFunction<[
DepBreakingClass<[ VXORPSrr, VXORPDrr ], ZeroIdiomPredicate>,
// AVX YMM Zero-idioms.
- DepBreakingClass<[ VXORPSYrr ], ZeroIdiomPredicate>,
+ DepBreakingClass<[ VXORPSYrr, VXORPDYrr ], ZeroIdiomPredicate>,
]>;
def : IsDepBreakingFunction<[
diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-ymm.s b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-ymm.s
index 784cda5e0175..0885e7d5ca92 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-ymm.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-ymm.s
@@ -106,13 +106,13 @@ vxorpd %ymm1, %ymm0, %ymm0
# CHECK: Iterations: 10000
# CHECK-NEXT: Instructions: 20000
-# CHECK-NEXT: Total Cycles: 20003
+# CHECK-NEXT: Total Cycles: 3337
# CHECK-NEXT: Total uOps: 20000
# CHECK: Dispatch Width: 6
-# CHECK-NEXT: uOps Per Cycle: 1.00
-# CHECK-NEXT: IPC: 1.00
-# CHECK-NEXT: Block RThroughput: 0.5
+# CHECK-NEXT: uOps Per Cycle: 5.99
+# CHECK-NEXT: IPC: 5.99
+# CHECK-NEXT: Block RThroughput: 0.3
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -123,17 +123,17 @@ vxorpd %ymm1, %ymm0, %ymm0
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
-# CHECK-NEXT: 1 1 0.25 vxorpd %ymm0, %ymm0, %ymm0
+# CHECK-NEXT: 1 0 0.17 vxorpd %ymm0, %ymm0, %ymm0
# CHECK-NEXT: 1 1 0.25 vxorpd %ymm1, %ymm0, %ymm0
# CHECK: Register File statistics:
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #1 -- Zn3FpPRF:
# CHECK-NEXT: Number of physical registers: 160
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #2 -- Zn3IntegerPRF:
# CHECK-NEXT: Number of physical registers: 192
@@ -167,20 +167,20 @@ vxorpd %ymm1, %ymm0, %ymm0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - - - - - - - - - - -
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
-# CHECK-NEXT: - - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - vxorpd %ymm0, %ymm0, %ymm0
-# CHECK-NEXT: - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - - vxorpd %ymm1, %ymm0, %ymm0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - vxorpd %ymm0, %ymm0, %ymm0
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - vxorpd %ymm1, %ymm0, %ymm0
# CHECK: Timeline view:
-# CHECK-NEXT: Index 0123456
+# CHECK-NEXT: Index 0123
-# CHECK: [0,0] DeER .. vxorpd %ymm0, %ymm0, %ymm0
-# CHECK-NEXT: [0,1] D=eER.. vxorpd %ymm1, %ymm0, %ymm0
-# CHECK-NEXT: [1,0] D==eER. vxorpd %ymm0, %ymm0, %ymm0
-# CHECK-NEXT: [1,1] D===eER vxorpd %ymm1, %ymm0, %ymm0
+# CHECK: [0,0] DR . vxorpd %ymm0, %ymm0, %ymm0
+# CHECK-NEXT: [0,1] DeER vxorpd %ymm1, %ymm0, %ymm0
+# CHECK-NEXT: [1,0] D--R vxorpd %ymm0, %ymm0, %ymm0
+# CHECK-NEXT: [1,1] DeER vxorpd %ymm1, %ymm0, %ymm0
# CHECK: Average Wait times (based on the timeline view):
# CHECK-NEXT: [0]: Executions
@@ -189,6 +189,6 @@ vxorpd %ymm1, %ymm0, %ymm0
# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
# CHECK: [0] [1] [2] [3]
-# CHECK-NEXT: 0. 2 2.0 0.5 0.0 vxorpd %ymm0, %ymm0, %ymm0
-# CHECK-NEXT: 1. 2 3.0 0.0 0.0 vxorpd %ymm1, %ymm0, %ymm0
-# CHECK-NEXT: 2 2.5 0.3 0.0 <total>
+# CHECK-NEXT: 0. 2 0.0 0.0 1.0 vxorpd %ymm0, %ymm0, %ymm0
+# CHECK-NEXT: 1. 2 1.0 1.0 0.0 vxorpd %ymm1, %ymm0, %ymm0
+# CHECK-NEXT: 2 0.5 0.5 0.5 <total>
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