[PATCH] D102333: [AArch64] Combine shift instructions in SelectionDAG
Andrew Savonichev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 12 08:54:56 PDT 2021
asavonic created this revision.
asavonic added reviewers: dmgreen, SjoerdMeijer, jmolloy.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
asavonic requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
bswap.v2i16 + sitofp in LLVM IR generate a sequence of:
- REV32 + USHR for bswap.v2i16
- SHL + SSHR + SCVTF for sext to v2i32 and scvtf
As noted in PR24820, the shift instructions are excessive, and they can
be optimized to just SSHR.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D102333
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/aarch64-bswap-ext.ll
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