[PATCH] D102166: AMDGPU: Fix SILoadStoreOptimizer for gfx90a

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
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This was hardcoding the register class to use for the newly created
pointer registers, violating the aligned VGPR requirement.


https://reviews.llvm.org/D102166

Files:
  llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx90a.mir
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll

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