[PATCH] D101938: [RISCV] Initial version of a demand based vsetvli insertion pass.
ShihPo Hung via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 6 23:17:33 PDT 2021
arcbbb added a comment.
LGTM.
I think https://reviews.llvm.org/D100932 is still useful here.
How do you think if I move it into `RISCVInsertVSETVLI.cpp` instead?
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:133
+ if (!(TSFlags & RISCVII::HasVLOpMask)) {
+ // This instruction isn't changing VL, if it has the same VTYPE as the last
+ // VSETVLI we're done.
----------------
is it enough to say this instruction is not reading VL?
If yes, we don't have to add VL implicit use if HasVLOpMask is false.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D101938/new/
https://reviews.llvm.org/D101938
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