[PATCH] D101938: [RISCV] Initial version of a demand based vsetvli insertion pass.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:150
+  if (VLOp.isImm()) {
+    int64_t Imm = VLOp.getImm();
+
----------------
Should we check the range of immediate? vsetivli only has 5-bits immediate field.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:202
+
+  // Clear the GPR, the we don't need it anymore
+  VLOp.setReg(RISCV::NoRegister);
----------------
Is 'the' redundant in the comment?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D101938/new/

https://reviews.llvm.org/D101938