[PATCH] D101414: [AMDGPU] Disable the scalar IR, SDWA and load store vectorizer passes at -O1

Baptiste Saleil via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 5 07:41:13 PDT 2021


bsaleil added a comment.

In D101414#2738462 <https://reviews.llvm.org/D101414#2738462>, @foad wrote:

> In D101414#2738443 <https://reviews.llvm.org/D101414#2738443>, @critson wrote:
>
>> llc-pipeline.ll has problems with -DLLVM_ENABLE_EXPENSIVE_CHECKS=1 as instruction verification seems to still take place.
>
> test/CodeGen/X86/opt-pipeline.ll uses `grep -v` to filter these lines out.

Thanks, I'll update the test to filter the lines with grep -v too for these bots.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101414/new/

https://reviews.llvm.org/D101414



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