[PATCH] D101414: [AMDGPU] Disable the scalar IR, SDWA and load store vectorizer passes at -O1

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

In D101414#2738443 <https://reviews.llvm.org/D101414#2738443>, @critson wrote:

> llc-pipeline.ll has problems with -DLLVM_ENABLE_EXPENSIVE_CHECKS=1 as instruction verification seems to still take place.

test/CodeGen/X86/opt-pipeline.ll uses `grep -v` to filter these lines out.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101414/new/

https://reviews.llvm.org/D101414