[PATCH] D101820: [AArch64][SVE] Extend svdup->insertelement instcombine pattern to support ...
Joe Ellis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 5 02:17:24 PDT 2021
joechrisellis marked an inline comment as done.
joechrisellis added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp:392
+ // this DUP are other DUPs that overwrite every vector element except for
+ // one. If this condition is not true, bail out.
+ if (PTruePattern != AArch64SVEPredPattern::vl1) {
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efriedma wrote:
> Instead of checking for this specific pattern, can we leverage simplifyDemandedVectorEltsIntrinsic? I guess that doesn't currently work with scalable vectors, though...
I'm not sure -- that function doesn't seem to have an override for AArch64 at the moment. Perhaps something for a different patch. 🙂
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https://reviews.llvm.org/D101820/new/
https://reviews.llvm.org/D101820
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