[PATCH] D101769: [LegalizeIntegerTypes] Promote EXTEND_VECTOR_INREG operands

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

This does feel like an imbalance in the legal RISCV vector types. Is it really worth adding another legalization case rather than just adding more simple vector types or making v256i32 illegal?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101769/new/

https://reviews.llvm.org/D101769