[PATCH] D101405: [AMDGPU] Change FLAT SADDR to VADDR form in moveToVALU
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 30 16:32:02 PDT 2021
rampitec added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll:21-23
+ %i8 = add nuw nsw i32 %i, 1
+ %i9 = icmp eq i32 %i8, 256
+ br i1 %i9, label %bb2, label %bb3
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arsenm wrote:
> Oh, this is the case where the loop index/pointer is really uniform, but forced to be a vector branch. It's just better to do the VALU address computation than do it scalar and copy with readfirstlane
Yes, the memory dependency tracing was another case related to the opposite situation. This is just because we are producing VGPRs with a uniform value for the pointer.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D101405/new/
https://reviews.llvm.org/D101405
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