[PATCH] D101405: [AMDGPU] Change FLAT SADDR to VADDR form in moveToVALU

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 27 15:38:36 PDT 2021


rampitec created this revision.
rampitec added reviewers: arsenm, Joe_Nash.
Herald added subscribers: kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
rampitec requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

Instead of legalizing saddr operand with a readfirstlane
when address is moved from SGPR to VGPR we can just
change the opcode.


https://reviews.llvm.org/D101405

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101405.341004.patch
Type: text/x-patch
Size: 22884 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210427/d045f525/attachment-0001.bin>


More information about the llvm-commits mailing list