[PATCH] D100527: [AArch64][SVE] More unpredicated ld1/st1 patterns for reg+reg addressing modes
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 2 02:34:07 PDT 2021
paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.
In D100527#2729910 <https://reviews.llvm.org/D100527#2729910>, @efriedma wrote:
> If you think it's worth addressing, I can try messing with the matcher.
That's OK, as you say, this is not a problem introduced by this patch and we have a good story for how to resolve the issues at a later date.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100527/new/
https://reviews.llvm.org/D100527
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