[PATCH] D101593: [AArch64][SVE] Remove index_vector node.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 30 05:09:49 PDT 2021
paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.
Please can you also remove INDEX_VECTOR from the AArch64ISD enum.
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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1371-1374
+ defm INDEX_RR : sve_int_index_rr<"index", step_vector, step_vector_oneuse, AArch64mul_p_oneuse>;
+ defm INDEX_IR : sve_int_index_ir<"index", step_vector, step_vector_oneuse, AArch64mul_p, AArch64mul_p_oneuse>;
+ defm INDEX_RI : sve_int_index_ri<"index", step_vector, step_vector_oneuse>;
+ defm INDEX_II : sve_int_index_ii<"index", step_vector, step_vector_oneuse>;
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As a tidy up I'd say these multiclasses are intrinsically linked to stepvector and related nodes. As these nodes now have a unified form I personally don't see much value with the indirection and think they can use all the operations directly within the multiclass.
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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:4875
- // add(mul(index_vector(0, 1), dup(Y), dup(X)) -> index_vector(X, Y).
- def : Pat<(add (muloneuseop (nxv16i1 (AArch64ptrue 31)), (nxv16i8 (oneuseop (i32 0), (i32 1))), (nxv16i8 (AArch64dup(i32 GPR32:$Rm)))), (nxv16i8 (AArch64dup(simm5_8b:$imm5)))),
+ // add(mul(step_vector(1), dup(Y), dup(X)) -> index(X, Y).
+ def : Pat<(add (muloneuseop (nxv16i1 (AArch64ptrue 31)), (nxv16i8 (oneuseop (i32 1))), (nxv16i8 (AArch64dup(i32 GPR32:$Rm)))), (nxv16i8 (AArch64dup(simm5_8b:$imm5)))),
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The `add(mul(step_vector` comments in this class and sve_int_index_rr are missing a close `)` for the `mul`.
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https://reviews.llvm.org/D101593/new/
https://reviews.llvm.org/D101593
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