[PATCH] D100284: [RISCV] Precommit a test case that test accessing a fixed object when has rvv vector object existed

luxufan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 29 19:33:51 PDT 2021


StephenFan updated this revision to Diff 341745.
StephenFan added a comment.

rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100284/new/

https://reviews.llvm.org/D100284

Files:
  llvm/test/CodeGen/RISCV/rvv/localvar.ll


Index: llvm/test/CodeGen/RISCV/rvv/localvar.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/localvar.ll
+++ llvm/test/CodeGen/RISCV/rvv/localvar.ll
@@ -287,5 +287,23 @@
   ret void
 }
 
+define i64 @fixed_object(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6, i64 %7, i64 %8) nounwind {
+; RV64IV-LABEL: fixed_object:
+; RV64IV:       # %bb.0:
+; RV64IV-NEXT:    addi sp, sp, -32
+; RV64IV-NEXT:    csrr a0, vlenb
+; RV64IV-NEXT:    slli a0, a0, 3
+; RV64IV-NEXT:    sub sp, sp, a0
+; RV64IV-NEXT:    ld a0, 32(sp)
+; RV64IV-NEXT:    csrr a1, vlenb
+; RV64IV-NEXT:    slli a1, a1, 3
+; RV64IV-NEXT:    add sp, sp, a1
+; RV64IV-NEXT:    addi sp, sp, 32
+; RV64IV-NEXT:    ret
+  %fixed_size = alloca i32
+  %rvv_vector = alloca <vscale x 8 x i64>, align 8
+  ret i64 %8
+}
+
 declare void @notdead(i8*, <vscale x 16 x i8>*)
 declare void @notdead2(i8*, i32*, <vscale x 16 x i8>*)


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