[llvm] 16d707e - [AMDGPU] Fix v_swap_b32 formation on physical registers

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-04-29T20:53:40+01:00
New Revision: 16d707e656ecd54934afe6c3adb5f710fd6bb36c

URL: https://github.com/llvm/llvm-project/commit/16d707e656ecd54934afe6c3adb5f710fd6bb36c
DIFF: https://github.com/llvm/llvm-project/commit/16d707e656ecd54934afe6c3adb5f710fd6bb36c.diff

LOG: [AMDGPU] Fix v_swap_b32 formation on physical registers

As explained in the comments, matchSwap matches:

// mov t, x
// mov x, y
// mov y, t

and turns it into:

// mov t, x (t is potentially dead and move eliminated)
// v_swap_b32 x, y

On physical registers we don't have full use-def chains so the check
for T being live-out was not working properly with subregs/superregs.

Differential Revision: https://reviews.llvm.org/D101546

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
    llvm/test/CodeGen/AMDGPU/v_swap_b32.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index cdb78aae1c4f..c8e317bab7d8 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -573,7 +573,7 @@ static MachineInstr* matchSwap(MachineInstr &MovT, MachineRegisterInfo &MRI,
     dropInstructionKeepingImpDefs(*MovY, TII);
     MachineInstr *Next = &*std::next(MovT.getIterator());
 
-    if (MRI.use_nodbg_empty(T)) {
+    if (T.isVirtual() && MRI.use_nodbg_empty(T)) {
       dropInstructionKeepingImpDefs(MovT, TII);
     } else {
       Xop.setIsKill(false);

diff  --git a/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir b/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
index be66fbf94132..8c9350c0be2a 100644
--- a/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
+++ b/llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
@@ -2,6 +2,7 @@
 
 # GCN-LABEL: name: swap_phys_condensed
 # GCN: bb.0:
+# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec
 # GCN-NEXT: S_SETPC_B64_return
 ---
@@ -17,6 +18,7 @@ body:             |
 
 # GCN-LABEL: name: swap_phys_sparse
 # GCN: bb.0:
+# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr3 = V_MOV_B32_e32 killed $vgpr4, implicit $exec
 # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr5 = V_MOV_B32_e32 killed $vgpr6, implicit $exec
@@ -50,9 +52,9 @@ body:             |
     S_SETPC_B64_return $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr2, implicit $vgpr1
 ...
 
-# FIXME: should not remove the def of $vgpr2 because $vgpr2_vgpr3 is live out
 # GCN-LABEL: name: swap_phys_liveout_superreg
 # GCN: bb.0:
+# GCN-NEXT: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec
 # GCN-NEXT: S_SETPC_B64_return
 ---
@@ -68,6 +70,7 @@ body:             |
 
 # GCN-LABEL: name: swap_phys_b64
 # GCN: bb.0:
+# GCN-NEXT: $vgpr4_vgpr5 = COPY $vgpr0_vgpr1
 # GCN-NEXT: $vgpr0, $vgpr2 = V_SWAP_B32 $vgpr2, $vgpr0, implicit $exec
 # GCN-NEXT: $vgpr1, $vgpr3 = V_SWAP_B32 $vgpr3, $vgpr1, implicit $exec
 ---
@@ -881,7 +884,7 @@ body:             |
 ...
 
 # GCN-LABEL: implicit_ops_mov_t_swap_b32
-# GCN:      $vgpr1 = IMPLICIT_DEF
+# GCN:      $vgpr3 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $vgpr2, implicit killed $vgpr1_vgpr2, implicit-def $vgpr1
 # GCN-NEXT: $vgpr0, $vgpr1 = V_SWAP_B32 $vgpr1, $vgpr0, implicit $exec
 
 ---