[PATCH] D101489: [InstCombine] improve demanded bits analysis of left-shifted operand
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 28 14:36:38 PDT 2021
spatel added inline comments.
================
Comment at: llvm/test/Transforms/InstCombine/rotate.ll:446
; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[V:%.*]] to i8
-; CHECK-NEXT: [[CONV2:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP3]], i8 [[TMP3]], i8 [[TMP2]])
+; CHECK-NEXT: [[TMP4:%.*]] = trunc i32 [[V]] to i8
+; CHECK-NEXT: [[CONV2:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP3]], i8 [[TMP4]], i8 [[TMP2]])
----------------
The extra trunc now matches the test below this one. We're using MaskedValueIsZero() to match the funnel/rotate operand, so it's not clear how to tell if they start at the same value in this case. CSE should take care of it.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D101489/new/
https://reviews.llvm.org/D101489
More information about the llvm-commits
mailing list