[PATCH] D101489: [InstCombine] improve demanded bits analysis of left-shifted operand

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/rotate.ll:446
 ; CHECK-NEXT:    [[TMP3:%.*]] = trunc i32 [[V:%.*]] to i8
-; CHECK-NEXT:    [[CONV2:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP3]], i8 [[TMP3]], i8 [[TMP2]])
+; CHECK-NEXT:    [[TMP4:%.*]] = trunc i32 [[V]] to i8
+; CHECK-NEXT:    [[CONV2:%.*]] = call i8 @llvm.fshr.i8(i8 [[TMP3]], i8 [[TMP4]], i8 [[TMP2]])
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The extra trunc now matches the test below this one. We're using MaskedValueIsZero() to match the funnel/rotate operand, so it's not clear how to tell if they start at the same value in this case. CSE should take care of it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101489/new/

https://reviews.llvm.org/D101489