[PATCH] D101369: [AArch64][SVE] Fold insert(zero, extract(X, 0), 0) -> X, when X is known to zero lanes 1-N

[Bradley Smith via Phabricator via llvm-commits]

bsmith updated this revision to Diff 341229.
bsmith marked 4 inline comments as done.
bsmith added a comment.

- Move combine switch logic into a separate function
- Reuse existing isConstantSplatVectorAllZeros function


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101369/new/

https://reviews.llvm.org/D101369

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-implicit-zero-filling.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101369.341229.patch
Type: text/x-patch
Size: 14621 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210428/313a175b/attachment.bin>