[PATCH] D101383: Disable vinsw, vinsd, and vins[wd][lr]x P10 instructions in P10

Zarko Todorovski via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 27 10:56:06 PDT 2021


ZarkoCA created this revision.
ZarkoCA added reviewers: nemanjai, bmahjour, amyk, stefanp, power-llvm-team.
ZarkoCA added a project: LLVM.
Herald added a subscriber: hiraditya.
ZarkoCA requested review of this revision.
Herald added a subscriber: llvm-commits.

Currently there is no safe way to emit these in 32bit mode on P10 <https://reviews.llvm.org/P10>. Leaving 
them leads to build failures with `-mcpu=pwr10`, this patch disable these.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101383

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll

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