[PATCH] D101118: [RISCV] Remove GetVRegNoV0 from the output register class of masked compare pseudo instructions.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 23 09:40:37 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG3064a63b2b33: [RISCV] Remove GetVRegNoV0 from the output register class of masked compareā€¦ (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101118/new/

https://reviews.llvm.org/D101118

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll

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