[PATCH] D101118: [RISCV] Remove GetVRegNoV0 from the output register class of masked compare pseudo instructions.

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 22 23:38:20 PDT 2021

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HsiangKai accepted this revision.
HsiangKai added a comment.
This revision is now accepted and ready to land.

LGTM.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D101118/new/

https://reviews.llvm.org/D101118

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