[PATCH] D101115: [AMDGPU] Move code sinking before structurizer

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 23 05:58:05 PDT 2021


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/multilevel-break.ll:198
 ; GCN-NEXT:    ; =>This Inner Loop Header: Depth=1
-; GCN-NEXT:    buffer_load_dword v1, off, s[0:3], 0
+; GCN-NEXT:    buffer_load_dword v1, off, s[0:3], 0 glc
 ; GCN-NEXT:    s_waitcnt vmcnt(0)
----------------
arsenm wrote:
> Did this drop the memory operand or something? This looks like a regression
Oh, these loads are already volatile and should have had glc set. Maybe this test was last regenerated before glc was emitted for volatile loads?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101115/new/

https://reviews.llvm.org/D101115



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