[PATCH] D100960: [AMDGPU] Fix typo in implicit operand lists

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 21 08:53:01 PDT 2021


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir:35
+    ; CHECK: $exec = S_MOV_B64 killed $sgpr4_sgpr5
+    ; CHECK: $vgpr2 = V_WRITELANE_B32 $sgpr33, 0, undef $vgpr2
     ; CHECK: $sgpr33 = frame-setup S_ADD_U32 $sgpr32, 524224, implicit-def $scc
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Why is this use undef, and why is it saving the VGPR just saved to memory?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100960/new/

https://reviews.llvm.org/D100960



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