[PATCH] D100430: [AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads
Vang Thao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 21 08:30:40 PDT 2021
vangthao updated this revision to Diff 339248.
vangthao added a comment.
Reverted buildZExtInReg changes for later patch. Addressed comments.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100430/new/
https://reviews.llvm.org/D100430
Files:
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
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