[PATCH] D100745: [AArch64] Add AArch64TTIImpl::getMaskedMemoryOpCost function

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 21 05:07:19 PDT 2021


david-arm added a comment.

In D100745#2704767 <https://reviews.llvm.org/D100745#2704767>, @dmgreen wrote:

> Also, why is isLegalMaskedLoad returning true if there are not any legal masked loads for that type?
> (Not that adding these extra costs isn't a good thing, it's good to have a better default than just 1, and a good cost is useful in many places).

This is because as soon as you enable SVE you effectively switch on masked loads and stores. The vectoriser only calls isLegalMaskedLoad with an element type, not a vector type. This means that we can't distinguish between fixed width and scalable vectors.



================
Comment at: llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp:1446
-  // generated code.
-  return cast<FixedVectorType>(Src)->getNumElements() * 8;
 }
----------------
dmgreen wrote:
> Br and PHI are often free, but were accounted for here. I think the old code might have been fine, and more accurate for arm.
OK sure, I'll revert it then. I'm not sure the BasicTTIImpl is that accurate for AArch64 either, because we treat branches as zero cost for some reason. Also, probably the i1 vector extract cost is too low as well.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100745/new/

https://reviews.llvm.org/D100745



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