[PATCH] D100026: [X86] Support AMX fast register allocation
Xiang Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 20 20:24:15 PDT 2021
xiangzhangllvm added a comment.
Thanks for your reviewing!
================
Comment at: llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir:31
+ %16 = bitcast <16 x i32>* %6 to i8*
+ store <16 x i32> zeroinitializer, <16 x i32>* %6, align 64
+ %amx.tmm.0.shape.row1 = getelementptr i8, i8* %16, i64 48
----------------
pengfei wrote:
> Nit: the source lacks palette initialization. It depends on you add it or not.
Yes, here doesn't matter, this test focus on checking rewiting shapes after fast register allocation.
So I didn't write the palette in the test.
In other tests (amx-configO2toO0.ll, amx-configO0toO0.ll) we can see the palette is set to 1.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100026/new/
https://reviews.llvm.org/D100026
More information about the llvm-commits
mailing list