[PATCH] D100026: [X86] Support AMX fast register allocation
Pengfei Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 20 19:48:54 PDT 2021
pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.
The implementation is good to me in general. Let's wait a few days to see opinions from community and other reviewers.
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Comment at: llvm/test/CodeGen/X86/AMX/amx-fast-tile-config.mir:31
+ %16 = bitcast <16 x i32>* %6 to i8*
+ store <16 x i32> zeroinitializer, <16 x i32>* %6, align 64
+ %amx.tmm.0.shape.row1 = getelementptr i8, i8* %16, i64 48
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Nit: the source lacks palette initialization. It depends on you add it or not.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100026/new/
https://reviews.llvm.org/D100026
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