[llvm] 9c1a145 - Rearrange code to reduce diff for D99687 [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2021-04-20T11:40:15-07:00
New Revision: 9c1a145aeb1b3ea3f78d837fa680d9a35bae28ee

URL: https://github.com/llvm/llvm-project/commit/9c1a145aeb1b3ea3f78d837fa680d9a35bae28ee
DIFF: https://github.com/llvm/llvm-project/commit/9c1a145aeb1b3ea3f78d837fa680d9a35bae28ee.diff

LOG: Rearrange code to reduce diff for D99687 [nfc]

Adding the switches to reduce diffs.  I'm about to split that into an lshr part and an ashr part, doing the NFC part first makes it easier to maintain both diffs.

Added: 
    

Modified: 
    llvm/lib/Analysis/ScalarEvolution.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp
index a6fa8427461c..9e4814398b6b 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -5693,8 +5693,16 @@ getRangeForUnknownRecurrence(const SCEVUnknown *U) {
     // until the caller issue can be fixed.  PR49566 tracks the bug.
     return CR;
 
-  // TODO: Handle ashr and lshr cases to increase minimum value reported
-  if (BO->getOpcode() != Instruction::Shl || BO->getOperand(0) != P)
+  // TODO: Extend to other opcodes such as ashr, mul, and div
+  switch (BO->getOpcode()) {
+  default:
+    return CR;
+  case Instruction::Shl:
+    break;
+  };
+
+  if (BO->getOperand(0) != P)
+    // TODO: Handle the power function forms some day.
     return CR;
 
   unsigned TC = getSmallConstantMaxTripCount(L);
@@ -5714,12 +5722,19 @@ getRangeForUnknownRecurrence(const SCEVUnknown *U) {
   if (Overflow)
     return CR;
 
-  // Iff no bits are shifted out, value increases on every shift.
-  auto KnownEnd = KnownBits::shl(KnownStart,
-                                 KnownBits::makeConstant(TotalShift));
-  if (TotalShift.ult(KnownStart.countMinLeadingZeros()))
-    CR = CR.intersectWith(ConstantRange(KnownStart.getMinValue(),
-                                        KnownEnd.getMaxValue() + 1));
+  switch (BO->getOpcode()) {
+  default:
+    llvm_unreachable("filtered out above");
+  case Instruction::Shl: {
+    // Iff no bits are shifted out, value increases on every shift.
+    auto KnownEnd = KnownBits::shl(KnownStart,
+                                   KnownBits::makeConstant(TotalShift));
+    if (TotalShift.ult(KnownStart.countMinLeadingZeros()))
+      CR = CR.intersectWith(ConstantRange(KnownStart.getMinValue(),
+                                          KnownEnd.getMaxValue() + 1));
+    break;
+  }
+  };
   return CR;
 }