[PATCH] D100527: [AArch64][SVE] More unpredicated ld1/st1 patterns for reg+reg addressing modes

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I'll multiclass the patterns so they don't repeat; maybe a little more verbose than the ideal, but probably good enough.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100527/new/

https://reviews.llvm.org/D100527