[PATCH] D100767: [RISCV][test] Add a new test of addition

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

This test will show how

; RV64I:       # %bb.0:
; RV64I-NEXT:    lui a1, 1
; RV64I-NEXT:    addiw a1, a1, -1097
; RV64I-NEXT:    addw a0, a0, a1
; RV64I-NEXT:    ret

are optimized to

; RV64I:       # %bb.0:
; RV64I-NEXT:    addiw a0, a0, 1500
; RV64I-NEXT:    addiw a0, a0, 1499
; RV64I-NEXT:    ret


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100767/new/

https://reviews.llvm.org/D100767