[PATCH] D100244: [ARM] Create VMOVRRD from adjacent vector extracts

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 19 03:25:38 PDT 2021


SjoerdMeijer added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14203
+
+  // Find another other extract, of Lane + 1
+  auto OtherIt = find_if(Op0->uses(), [&](SDNode *V) {
----------------
Typo: `another other`?


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14207
+           isa<ConstantSDNode>(V->getOperand(1)) &&
+           V->getConstantOperandVal(1) == Lane + 1;
+  });
----------------
Out of curiousity, this means we recognise:

  vmov.32 r3, d18[0]
  vmov.32 r2, d18[1]

but not:

  vmov.32 r2, d18[1]
  vmov.32 r3, d18[0]

?


================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14207
+           isa<ConstantSDNode>(V->getOperand(1)) &&
+           V->getConstantOperandVal(1) == Lane + 1;
+  });
----------------
SjoerdMeijer wrote:
> Out of curiousity, this means we recognise:
> 
>   vmov.32 r3, d18[0]
>   vmov.32 r2, d18[1]
> 
> but not:
> 
>   vmov.32 r2, d18[1]
>   vmov.32 r3, d18[0]
> 
> ?
Just out of u


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100244/new/

https://reviews.llvm.org/D100244



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