[PATCH] D100618: [RISCV] Pad v4i1/v2i1/v1i1 stores with 0s to make a full byte.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:3624
 
-  // FIXME: We probably need to zero any extra bits in a byte for mask stores.
-  // This is tricky to do.
+  // If the size less than a byte, we need to the unused bits with 0s.
+  if (VT.getVectorElementType() == MVT::i1 && VT.getVectorNumElements() < 8) {
----------------
nit: ... need to pad the unused ...


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  https://reviews.llvm.org/D100618/new/

https://reviews.llvm.org/D100618