[PATCH] D100566: [SCEV] Add a ah-hoc pattern on isImpliedCondBalancedTypes

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 15 08:25:55 PDT 2021


jaykang10 updated this revision to Diff 337776.
jaykang10 added a comment.

Fixed a typo


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100566/new/

https://reviews.llvm.org/D100566

Files:
  llvm/lib/Analysis/ScalarEvolution.cpp
  llvm/test/Transforms/IRCE/sibling_loops.ll
  llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll
  llvm/test/Transforms/IndVarSimplify/lftr-pr20680.ll

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