[PATCH] D100383: [LSR] Fix for pre-indexed generated constant offset

[Stelios Ioannou via Phabricator via llvm-commits]

stelios-arm updated this revision to Diff 337396.
stelios-arm edited the summary of this revision.
stelios-arm added a comment.

1. Added a test that triggers the assertion failure.
2. Changed the isLegalUse parameters in LSRInstance::GenerateConstantOffsetsImpl  to look the same as the assertion used for illegal formulas.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100383/new/

https://reviews.llvm.org/D100383

Files:
  llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
  llvm/test/Transforms/LoopStrengthReduce/AArch64/pre-inc-offset-check.ll


Index: llvm/test/Transforms/LoopStrengthReduce/AArch64/pre-inc-offset-check.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopStrengthReduce/AArch64/pre-inc-offset-check.ll
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-none-eabi -lsr-preferred-addressing-mode=preindexed %s -o - | FileCheck %s
+
+%"Type" = type <{[166 x [338 x i8]]}>
+
+define void @test_pre_inc(%"Type"* %p) {
+; CHECK-LABEL: test_pre_inc:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    add x8, x0, #340 // =340
+; CHECK-NEXT:    mov w9, #165
+; CHECK-NEXT:    mov w10, #2
+; CHECK-NEXT:  .LBB0_1: // %main
+; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    stur wzr, [x8, #-1]
+; CHECK-NEXT:    strb w10, [x8]
+; CHECK-NEXT:    subs x9, x9, #1 // =1
+; CHECK-NEXT:    add x8, x8, #338 // =338
+; CHECK-NEXT:    b.ne .LBB0_1
+; CHECK-NEXT:  // %bb.2: // %exit
+; CHECK-NEXT:    ret
+entry:
+  br label %main
+exit:
+  ret void
+if.then:
+  %arrayidx.i = getelementptr inbounds %"Type", %"Type"* %p, i64 0, i32 0, i64 %indvars, i64 1
+  %0 = bitcast i8* %arrayidx.i to i32*
+  store i32 0, i32* %0, align 1
+  br label %if.end
+if.end:
+  %arrayidx.p = getelementptr inbounds %"Type", %"Type"* %p, i64 0, i32 0, i64 %indvars, i64 2
+  store i8 2, i8* %arrayidx.p, align 1
+  %indvars.iv.next = add nuw nsw i64 %indvars, 1
+  %add.i = add nuw i8 %begin, 1
+  %cmp.i.not = icmp eq i64 %indvars.iv.next, 166
+  br i1 %cmp.i.not, label %exit, label %main
+main:
+  %begin = phi i8 [ 1, %entry ], [ %add.i, %if.end ]
+  %indvars = phi i64 [ 1, %entry ], [ %indvars.iv.next, %if.end ]
+  br label %if.then
+}
Index: llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -3792,7 +3792,7 @@
     Formula F = Base;
     F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
 
-    if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
+    if (isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
                    LU.AccessTy, F)) {
       // Add the offset to the base register.
       const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);


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