[PATCH] D85288: [PowerPC] Remove implicit use register after transformToImmFormFedByLI()
Kai Luo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 13 22:45:55 PDT 2021
lkail added a comment.
In D85288#2687705 <https://reviews.llvm.org/D85288#2687705>, @shchenz wrote:
>> implicit $x5 is in the explicit operand list.
>
> Should it be an issue that the `implicit $x5` should not be in the explicit operand list? Since when we have `implicit $x5` as an explicit operand?
Take
renamable $x5 = LI8 2
renamable $x4 = exact SRD killed renamable $x4, killed renamable $r5, implicit $x5
converted to
renamable $x5 = LI8 2
renamable $x4 = exact RLDICL killed renamable $x4, 62, 2, implicit killed $x5
as an example.
`SRD` has 2 explicit operands. When `SRD` is converted to `RLDICL` via setting a new MCID and `RLDICL` has 3 explicit operands, so `implicit $x5` is within `RLDICL`'s explicit operands. Later `replaceInstrOperandWithImm` is called and `killed renamable $r5` is converted to imm `62`. With origin impl, this instruction currently is
renamable $x4 = exact RLDICL killed renamable $x4, 62, implicit killed $x5
Then `achineInstrBuilder(*MI.getParent()->getParent(), MI).addImm(ME);` is called. Notice that `addImm`'s implementation will traverse the operand list and find a location explicit operand goes before implicit operand, so for now this instruction is
renamable $x4 = exact RLDICL killed renamable $x4, 62, 2, implicit killed $x5
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85288/new/
https://reviews.llvm.org/D85288
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