[PATCH] D99966: [X86][AMX] Refactor for PostRA ldtilecfg pass.

[Pengfei Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:153
+      int Offset = IsRow ? 48 + I : 16 + I * 2;
+      for (auto &DefMI : MRI.def_instructions(R)) {
+        int ImmCount = 0;
----------------
xiangzhangllvm wrote:
> The problem is the DefMI may comes from a reload, at its live range may not include the "shape_config_write" instructions which you want generated.
We insert MOV8mi/MOV8mr adjoining any DefMI, so live range is not a problem.
We may insert redundant store instructions for reload, but it won't result in correctness problems.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99966/new/

https://reviews.llvm.org/D99966