[PATCH] D100096: [RISCV] Support vector SET[U]LT and SET[U]GE with splatted immediates

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 12 03:37:12 PDT 2021


frasercrmck updated this revision to Diff 336795.
frasercrmck added a comment.

- rebase
- test and fix for unsigned comparisons with 0


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100096/new/

https://reviews.llvm.org/D100096

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
  llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll

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