[PATCH] D98844: [PowerPC] Enable fast-isel on AIX subtarget

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added a comment.

In D98844#2639276 <https://reviews.llvm.org/D98844#2639276>, @nemanjai wrote:

> This patch is missing context as well as a description. Can you please add both? It would be good to understand why we want FISEL on AIX. Perhaps some compile-time measurement on some significantly sized code. Also, some notes about how well this was tested would be useful. A different instruction selector is a significant change so it would be good to do some thorough testing at `-O0` including some binary compatibility testing (with GCC and/or the system compiler).

The motivating case is that unconditional branches are not folded for AIX `O0` code. Like code below:

  void foo();
  
  int x = 1000;
  int main() {
    for (int i = 0; i < x; i++)
      foo();
    return 0;
  }

DAG ISel counts on later optimization passes to do the folding while FastISel does it in branch selection. This is needed for correct debug behavior on AIX.

As for compiling time, I saw improvement on some benchmarks in test-suite. For 64-bit AIX target, this patch (actually, a smaller one) can pass SPEC benchmarks and LLVM test-suite, more work is needed for enabling it on 32-bit.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D98844/new/

https://reviews.llvm.org/D98844