[PATCH] D100063: [AMDGPU] Split GCNRegBankReassign
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 7 13:15:46 PDT 2021
rampitec added a comment.
In D100063#2674983 <https://reviews.llvm.org/D100063#2674983>, @arsenm wrote:
> Can't this just skip virtual registers? Does it really need to know which mode its in?
All registers are virtual here. It will skip a register if there is no assignment in VRM (and obviously skip physregs).
This is slower as it is though. I can add the check "Reg.isPhysical() || !VRM->isAssignedReg(Reg)" earlier to mitigate it.
Will that help?
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https://reviews.llvm.org/D100063/new/
https://reviews.llvm.org/D100063
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