[PATCH] D99083: [RISCV] Introduce floating point control and state registers

[Serge Pavlov via Phabricator via llvm-commits]

sepavloff added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1173
 
+def ReadFRM : ReadSysReg<SysRegFRM, [FRM]>;
+def WriteFRM : WriteSysReg<SysRegFRM, [FRM]>;
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sepavloff wrote:
> craig.topper wrote:
> > Do we have use cases for all of these?
> `ReadFRM` is used in the implementation of FLT_ROUNDS_ (D90854).
> `WriteFRM` and `WrireFRMImm` are used in the implementation of set_rounding (D91242).
> `SwapFRM` and `SwapFRMImm` are not used in any of pending patches but they are useful to implement target-specific optimization of the code pattern:
> ```
>     int old_rm = fegetround();
>     fesetround(new_rm);
>     ...
>     fesetround(old_rm);
> ```
> which is likely to be used in the implementation of `#pragma STDC FENV_ROUND`.
> 
> Operations with FFLAGS are not used now. They would be needed to implement functions like `fetestexcept` and similar, but now there are no such attempts AFAIK.
> 
> Operations would be needed for target specific implementation of intrinsics that access FP control modes (D82525) and FP environment (D71742).
> Operations would be needed for target specific implementation of intrinsics that access FP control modes (D82525) and FP environment (D71742).

It is about the operation on `FCSR`.


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  https://reviews.llvm.org/D99083/new/

https://reviews.llvm.org/D99083