[PATCH] D99910: [RISCV] Support vslide1up/down intrinsics for SEW=64 on RV32.

[Craig Topper via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGf087d7544a41: [RISCV] Support vslide1up/down intrinsics for SEW=64 on RV32. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99910/new/

https://reviews.llvm.org/D99910

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll

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