[PATCH] D99865: [RFC, AMDGPU, test] Fix use of undef FileCheck var

[Thomas Preud'homme via Phabricator via llvm-commits]

thopre created this revision.
thopre added reviewers: kzhuravl, foad, mbrkusanin, scott.linder, tstellar, JonChesterfield.
Herald added subscribers: kerbowa, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely.
thopre requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

Test CodeGen/AMDGPU/amdgpu.private-memory.ll and
CodeGen/AMDGPU/private-memory-r600.ll have a block of CHECK directives
whose prefix is inconsistent: R600-CHECK Vs R600. This leads to a
R600-NOT directive using an undefined CHAN variable due to R600-CHECK
directives never being considered by FileCheck. This date back to
880a80ad07b6ea7ead3a842fc03c74c2247c9486, when the two tests were only
one and the prefixes were R600_CHECK Vs R600-CHECK. They got renamed
along the way in d0b6f3e17377a081be61f801794d9d875db8878f and
39787bdcbb12dd4312402c41dcdee253b36ff660.

The directives also got rewritten in
880a80ad07b6ea7ead3a842fc03c74c2247c9486. Unfortunately at this point
fixing the prefix makes the test fail. The code generated is:

no_overlap:                             ; @no_overlap
; %bb.0:                                ; %entry

  ALU 40, @4, KC0[CB0:0-32], KC1[]
  MEM_RAT_CACHELESS STORE_RAW T5.X, T6.X, 1
  CF_END
  PAD
  ALU clause starting at 4:
    MOV * T0.Y, T2.X,
    AND_INT   T0.W, PV.Y, literal.x,
    AND_INT * T1.W, PV.Y, literal.y,
  -65281(nan), -16711681(-1.714704e+38)
    OR_INT   T0.Z, PS, literal.x,
    OR_INT   T0.W, PV.W, literal.y,
    AND_INT * T1.W, T0.Y, literal.z,
  131072(1.836710e-40), 256(3.587324e-43)
  -256(nan), 0(0.000000e+00)
    MOV * T2.X, PS,
    MOV * T2.X, T0.W,
    MOV   T2.X, T0.Z,
    MOV * T0.Y, T3.X,
    AND_INT   T0.Z, PV.Y, literal.x,
    ADD_INT   T0.W, KC0[2].Z, literal.y,
    ADD_INT * T1.W, KC0[2].Z, literal.z,
  -256(nan), 8(1.121039e-44)
  12(1.681558e-44), 0(0.000000e+00)
    LSHR   T1.Y, PS, literal.x,
    LSHR   T1.Z, PV.W, literal.x,
    AND_INT   T2.W, T0.Y, literal.y,
    OR_INT * T3.W, PV.Z, 1,
  2(2.802597e-45), -65281(nan)
    MOV * T3.X, PS,
    MOV * T3.X, T2.W,
    MOVA_INT * AR.x (MASKED), T1.Z,
    MOV * T0.Y, T(0 + AR.x).X+,
    MOVA_INT * AR.x (MASKED), T1.Y,
    MOV   T0.Z, T(0 + AR.x).X+,
    AND_INT   T1.W, T1.W, literal.x,
    AND_INT * T0.W, T0.W, literal.x,
  3(4.203895e-45), 0(0.000000e+00)
    LSHL   T0.W, PS, literal.x,
    LSHL * T1.W, PV.W, literal.x,
  3(4.203895e-45), 0(0.000000e+00)
    LSHR   T1.W, T0.Z, PS,
    LSHR * T0.W, T0.Y, PV.W,
    ADD_INT * T0.W, PS, PV.W,
    BFE_INT   T5.X, PV.W, 0.0, literal.x,
    LSHR * T6.X, KC0[2].Y, literal.y,
  8(1.121039e-44), 2(2.802597e-45)

.Lfunc_end7:

  .size   no_overlap, .Lfunc_end7-no_overlap

Can one of the AMDGPU maintainer help me determine what should the test
check?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99865

Files:
  llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
  llvm/test/CodeGen/AMDGPU/private-memory-r600.ll


Index: llvm/test/CodeGen/AMDGPU/private-memory-r600.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/private-memory-r600.ll
+++ llvm/test/CodeGen/AMDGPU/private-memory-r600.ll
@@ -168,8 +168,8 @@
 ; Test that two stack objects are not stored in the same register
 ; The second stack object should be in T3.X
 ; FUNC-LABEL: {{^}}no_overlap:
-; R600_CHECK: MOV
-; R600_CHECK: [[CHAN:[XYZW]]]+
+; R600: MOV
+; R600: [[CHAN:[XYZW]]]+
 ; R600-NOT: [[CHAN]]+
 define amdgpu_kernel void @no_overlap(i32 addrspace(1)* %out, i32 %in) #0 {
 entry:
Index: llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
+++ llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
@@ -275,8 +275,8 @@
 ; Test that two stack objects are not stored in the same register
 ; The second stack object should be in T3.X
 ; FUNC-LABEL: {{^}}no_overlap:
-; R600-CHECK: MOV
-; R600-CHECK: [[CHAN:[XYZW]]]+
+; R600: MOV
+; R600: [[CHAN:[XYZW]]]+
 ; R600-NOT: [[CHAN]]+
 ;
 ; A total of 5 bytes should be allocated and used.


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D99865.335170.patch
Type: text/x-patch
Size: 1154 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210404/07c2508c/attachment.bin>