[PATCH] D99083: [RISCV] Introduce floating point control and state registers

Serge Pavlov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 1 23:43:25 PDT 2021


sepavloff updated this revision to Diff 334904.
sepavloff added a comment.

Rebased ad added variants with immediate


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99083/new/

https://reviews.llvm.org/D99083

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/lib/Target/RISCV/RISCVSystemOperands.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D99083.334904.patch
Type: text/x-patch
Size: 6042 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210402/a27c9ec2/attachment.bin>


More information about the llvm-commits mailing list