[llvm] 42a84d2 - Revert "[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest"
Daniel Sanders via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 1 16:48:53 PDT 2021
Author: Daniel Sanders
Date: 2021-04-01T16:47:43-07:00
New Revision: 42a84d22c4e01f0305da0c850a8c695895fdba86
URL: https://github.com/llvm/llvm-project/commit/42a84d22c4e01f0305da0c850a8c695895fdba86
DIFF: https://github.com/llvm/llvm-project/commit/42a84d22c4e01f0305da0c850a8c695895fdba86.diff
LOG: Revert "[globalisel][unittests] Rename setUp() to avoid potential mix up with SetUp() from gtest"
Forgot to apply commit message changes from phabricator
This reverts commit 3a016e31ecef7eeb876b540c928a25a7c5d2e07a.
Added:
Modified:
llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
Removed:
################################################################################
diff --git a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
index bffebfc78c19..1bca56ff7a72 100644
--- a/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/CSETest.cpp
@@ -13,7 +13,7 @@
namespace {
TEST_F(AArch64GISelMITest, TestCSE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -109,7 +109,7 @@ TEST_F(AArch64GISelMITest, TestCSE) {
}
TEST_F(AArch64GISelMITest, TestCSEConstantConfig) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -139,7 +139,7 @@ TEST_F(AArch64GISelMITest, TestCSEConstantConfig) {
}
TEST_F(AArch64GISelMITest, TestCSEImmediateNextCSE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
diff --git a/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp b/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
index 82117a1932fd..127aaffc2878 100644
--- a/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/ConstantFoldingTest.cpp
@@ -18,7 +18,7 @@ using namespace llvm;
namespace {
TEST_F(AArch64GISelMITest, FoldWithBuilder) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
// Try to use the FoldableInstructionsBuilder to build binary ops.
@@ -69,7 +69,7 @@ TEST_F(AArch64GISelMITest, FoldWithBuilder) {
}
TEST_F(AArch64GISelMITest, FoldBinOp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -236,4 +236,4 @@ TEST_F(AArch64GISelMITest, FoldBinOp) {
EXPECT_EQ(16ULL, FoldGSremMix.getValue().getLimitedValue());
}
-} // namespace
+} // namespace
\ No newline at end of file
diff --git a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
index 47aa60b27681..336915ce8651 100644
--- a/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
+++ b/llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
@@ -112,27 +112,25 @@ class GISelMITest : public ::testing::Test {
virtual void getTargetTestModuleString(SmallString<512> &S,
StringRef MIRFunc) const = 0;
- LLVMTargetMachine *
- createTargetMachineAndModule(StringRef ExtraAssembly = "") {
- TheTM = createTargetMachine();
- if (!TheTM)
- return nullptr;
+ void setUp(StringRef ExtraAssembly = "") {
+ TM = createTargetMachine();
+ if (!TM)
+ return;
SmallString<512> MIRString;
getTargetTestModuleString(MIRString, ExtraAssembly);
- ModuleMMIPair = createDummyModule(Context, *TheTM, MIRString, "func");
+ ModuleMMIPair = createDummyModule(Context, *TM, MIRString, "func");
MF = getMFFromMMI(ModuleMMIPair.first.get(), ModuleMMIPair.second.get());
collectCopies(Copies, MF);
EntryMBB = &*MF->begin();
B.setMF(*MF);
MRI = &MF->getRegInfo();
B.setInsertPt(*EntryMBB, EntryMBB->end());
- return TheTM.get();
}
LLVMContext Context;
- std::unique_ptr<LLVMTargetMachine> TheTM;
+ std::unique_ptr<LLVMTargetMachine> TM;
MachineFunction *MF;
std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
ModuleMMIPair;
diff --git a/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp b/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
index e42ce38b6b4b..22e21600df05 100644
--- a/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
@@ -13,7 +13,7 @@
TEST_F(AArch64GISelMITest, TestKnownBitsCst) {
StringRef MIRString = " %3:_(s8) = G_CONSTANT i8 1\n"
" %4:_(s8) = COPY %3\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
@@ -33,7 +33,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsCst) {
TEST_F(AArch64GISelMITest, TestKnownBitsCstWithClass) {
StringRef MIRString = " %10:gpr32 = MOVi32imm 1\n"
" %4:_(s32) = COPY %10\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
@@ -72,7 +72,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsCstPHI) {
" bb.12:\n"
" %13:_(s8) = PHI %10(s8), %bb.10, %12(s8), %bb.11\n"
" %14:_(s8) = COPY %13\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -106,7 +106,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsCstPHIToNonGenericReg) {
" bb.12:\n"
" %13:_(s8) = PHI %10, %bb.10, %12(s8), %bb.11\n"
" %14:_(s8) = COPY %13\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -144,7 +144,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsUnknownPHI) {
" bb.12:\n"
" %13:_(s64) = PHI %10(s64), %bb.10, %12(s64), %bb.11\n"
" %14:_(s64) = COPY %13\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -181,7 +181,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsCstPHIWithLoop) {
" %13:_(s8) = PHI %10(s8), %bb.10, %12(s8), %bb.11, %14(s8), %bb.12\n"
" %14:_(s8) = COPY %13\n"
" G_BR %bb.12\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -220,7 +220,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsDecreasingCstPHIWithLoop) {
" %14:_(s8) = G_LSHR %13, %11\n"
" %15:_(s8) = COPY %14\n"
" G_BR %bb.12\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -248,7 +248,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsPtrToIntViceVersa) {
" %4:_(p0) = G_INTTOPTR %3\n"
" %5:_(s32) = G_PTRTOINT %4\n"
" %6:_(s32) = COPY %5\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
@@ -276,7 +276,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsAND) {
%copy_and:_(s8) = COPY %and
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -308,7 +308,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsOR) {
%copy_or:_(s8) = COPY %or
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -340,7 +340,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsXOR) {
%copy_xor:_(s8) = COPY %xor
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -363,7 +363,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsXORConstant) {
" %4:_(s8) = G_CONSTANT i8 7\n"
" %5:_(s8) = G_XOR %3, %4\n"
" %6:_(s8) = COPY %5\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
@@ -395,7 +395,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsASHR) {
%copy_ashr1:_(s8) = COPY %ashr1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -439,7 +439,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsLSHR) {
%copy_lshr1:_(s8) = COPY %lshr1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -476,7 +476,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSHL) {
%copy_shl:_(s8) = COPY %shl
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -507,7 +507,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsADD) {
%copy_add:_(s16) = COPY %add
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -540,7 +540,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSUB) {
%copy_sub:_(s16) = COPY %sub
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -567,7 +567,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsMUL) {
%copy_mul:_(s16) = COPY %mul
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -595,7 +595,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsICMP) {
%copy_icmp:_(s32) = COPY %icmp
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -618,7 +618,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsFCMP) {
%copy_fcmp:_(s32) = COPY %fcmp
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -650,7 +650,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSelect) {
%copy_select:_(s8) = COPY %select
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -683,7 +683,7 @@ TEST_F(AArch64GISelMITest, TestKnownBits) {
" %11:_(s32) = G_OR %9, %16\n"
" %12:_(s32) = G_MUL %10, %11\n"
" %13:_(s32) = COPY %12\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIR);
+ setUp(MIR);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
@@ -699,7 +699,7 @@ TEST_F(AArch64GISelMITest, TestKnownBits) {
}
TEST_F(AArch64GISelMITest, TestSignBitIsZero) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -728,7 +728,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsConstant) {
" %11:_(s8) = G_CONSTANT i8 -32\n"
" %12:_(s8) = COPY %11\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg1 = Copies[Copies.size() - 5];
@@ -754,7 +754,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsSext) {
" %7:_(s8) = G_CONSTANT i8 -1\n"
" %8:_(s32) = G_SEXT %7\n"
" %9:_(s32) = COPY %8\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopySextLoad = Copies[Copies.size() - 2];
@@ -801,7 +801,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsSextInReg) {
%copy_inreg31_sext:_(s32) = COPY %inreg31_sext
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -868,7 +868,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsAssertSext) {
%copy_assert_sext31_sext:_(s32) = COPY %assert_sext31_sext
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -911,7 +911,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsTrunc) {
" %10:_(s32) = G_CONSTANT i32 7\n"
" %11:_(s8) = G_TRUNC %10\n"
" %12:_(s8) = COPY %11\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyTruncLoad = Copies[Copies.size() - 3];
@@ -940,7 +940,7 @@ TEST_F(AMDGPUGISelMITest, TestNumSignBitsTrunc) {
" %11:_(s32) = G_AMDGPU_BUFFER_LOAD_SSHORT %3, %4, %4, %4, 0, 0, 0 :: (load 2)\n"
" %12:_(s32) = COPY %11\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -970,7 +970,7 @@ TEST_F(AMDGPUGISelMITest, TestTargetKnownAlign) {
" %13:_(p4) = G_INTRINSIC intrinsic(@llvm.amdgcn.implicit.buffer.ptr)\n"
" %14:_(p4) = COPY %13\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1032,7 +1032,7 @@ TEST_F(AMDGPUGISelMITest, TestIsKnownToBeAPowerOfTwo) {
%copy_or_pow2:_(s32) = COPY %or_pow2
)MIR";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1077,7 +1077,7 @@ TEST_F(AArch64GISelMITest, TestMetadata) {
" %cst:_(s32) = G_CONSTANT i32 1\n"
" %and:_(s32) = G_AND %ext, %cst\n"
" %copy:_(s32) = COPY %and(s32)\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1128,7 +1128,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsExt) {
" %r2:_(s32) = COPY %zext\n"
" %sext:_(s32) = G_SEXT %y(s16)\n"
" %r3:_(s32) = COPY %sext\n";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyRegAny = Copies[Copies.size() - 3];
@@ -1198,7 +1198,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSextInReg) {
%copy_inreg4:_(s32) = COPY %inreg4
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
GISelKnownBits Info(*MF);
@@ -1269,7 +1269,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsAssertSext) {
%assert_sext4:_(s32) = G_ASSERT_SEXT %ten, 2
%copy_assert_sext4:_(s32) = COPY %assert_sext4
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
GISelKnownBits Info(*MF);
@@ -1314,7 +1314,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsMergeValues) {
%merge:_(s64) = G_MERGE_VALUES %val0, %val1, %val2, %val3
%mergecopy:_(s64) = COPY %merge
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1338,7 +1338,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsUnmergeValues) {
%part3:_(s16) = COPY %val3
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1365,7 +1365,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsBSwapBitReverse) {
%copy_bswap:_(s32) = COPY %bswap
%copy_bitreverse:_(s32) = COPY %bitreverse
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1414,7 +1414,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsUMAX) {
%copy_umax1:_(s8) = COPY %umax1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1452,7 +1452,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsUMax) {
%umax:_(s64) = G_UMAX %zext, %const
%copy_umax:_(s64) = COPY %umax
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1484,7 +1484,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsUMIN) {
%copy_umin:_(s8) = COPY %umin
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1518,7 +1518,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSMAX) {
%copy_smax:_(s8) = COPY %smax
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1553,7 +1553,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsSMIN) {
%copy_smin:_(s8) = COPY %smin
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1582,7 +1582,7 @@ TEST_F(AArch64GISelMITest, TestInvalidQueries) {
%biggerSized:_(s32) = G_SHL %src, %thirty3
%copy2:_(s32) = COPY %biggerSized
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1624,7 +1624,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsAssertZext) {
%copy_assert3:_(s64) = COPY %assert3
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
diff --git a/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp b/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
index 4ee0b795c819..9cb8a365ae99 100644
--- a/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
@@ -26,7 +26,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsBuildVector) {
%copy_vector:_(<2 x s8>) = COPY %vector
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -67,7 +67,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorCstPHI) {
%16:_(<2 x s8>) = COPY %15
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -103,7 +103,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorCstPHIToNonGenericReg) {
%16:_(<2 x s16>) = COPY %15
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -139,7 +139,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorUnknownPHI) {
%15:_(<2 x s32>) = COPY %14
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -177,7 +177,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorCstPHIWithLoop) {
G_BR %bb.12
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -209,7 +209,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorDecreasingCstPHIWithLoop) {
G_BR %bb.12
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyReg = Copies[Copies.size() - 1];
@@ -246,7 +246,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorAND) {
%copy_and:_(<2 x s8>) = COPY %and
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -279,7 +279,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorOR) {
%copy_or:_(<2 x s8>) = COPY %or
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -312,7 +312,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorXOR) {
%copy_xor:_(<2 x s8>) = COPY %xor
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -340,7 +340,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorXORConstant) {
%12:_(<2 x s8>) = COPY %11
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -385,7 +385,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorASHR) {
%copy_ashr1:_(<2 x s8>) = COPY %ashr1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -430,7 +430,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorLSHR) {
%copy_lshr1:_(<2 x s8>) = COPY %lshr1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -466,7 +466,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSHL) {
%copy_shl:_(<2 x s8>) = COPY %shl
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -499,7 +499,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorADD) {
%copy_add:_(<2 x s16>) = COPY %add
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -532,7 +532,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSUB) {
%copy_sub:_(<2 x s16>) = COPY %sub
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -561,7 +561,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorMUL) {
%copy_mul:_(<2 x s16>) = COPY %mul
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -596,7 +596,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSelect) {
%copy_select:_(<2 x s8>) = COPY %select
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -610,7 +610,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSelect) {
}
TEST_F(AArch64GISelMITest, TestVectorSignBitIsZero) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -669,7 +669,7 @@ TEST_F(AArch64GISelMITest, TestVectorNumSignBitsConstant) {
%21:_(<2 x s8>) = COPY %20
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -712,7 +712,7 @@ TEST_F(AArch64GISelMITest, TestVectorNumSignBitsSext) {
%14:_(<2 x s32>) = COPY %13
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopySextLoad = Copies[Copies.size() - 3];
@@ -761,7 +761,7 @@ TEST_F(AArch64GISelMITest, TestVectorNumSignBitsSextInReg) {
%copy_inreg31_sext:_(<2 x s32>) = COPY %inreg31_sext
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -828,7 +828,7 @@ TEST_F(AArch64GISelMITest, TestNumSignBitsVectorAssertSext) {
%copy_assert_sext31_sext:_(<2 x s32>) = COPY %assert_sext31_sext
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -876,7 +876,7 @@ TEST_F(AArch64GISelMITest, TestVectorNumSignBitsTrunc) {
%14:_(<2 x s8>) = COPY %13
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -939,7 +939,7 @@ TEST_F(AMDGPUGISelMITest, TestVectorIsKnownToBeAPowerOfTwo) {
%copy_or_pow2:_(<2 x s32>) = COPY %or_pow2
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -988,7 +988,7 @@ TEST_F(AArch64GISelMITest, TestVectorMetadata) {
%copy:_(<2 x s32>) = COPY %and(<2 x s32>)
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1037,7 +1037,7 @@ TEST_F(AArch64GISelMITest, TestVectorKnownBitsExt) {
%r3:_(<2 x s32>) = COPY %sext
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
Register CopyRegAny = Copies[Copies.size() - 3];
@@ -1110,7 +1110,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSextInReg) {
%copy_inreg4:_(<2 x s32>) = COPY %inreg4
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
GISelKnownBits Info(*MF);
@@ -1178,7 +1178,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorAssertSext) {
%assert_sext4:_(<2 x s32>) = G_ASSERT_SEXT %ten_splat, 2
%copy_assert_sext4:_(<2 x s32>) = COPY %assert_sext4
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
GISelKnownBits Info(*MF);
@@ -1223,7 +1223,7 @@ TEST_F(AArch64GISelMITest, TestVectorKnownBitsBSwapBitReverse) {
%copy_bswap:_(<2 x s32>) = COPY %bswap
%copy_bitreverse:_(<2 x s32>) = COPY %bitreverse
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1280,7 +1280,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorUMAX) {
%copy_umax1:_(<2 x s8>) = COPY %umax1
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1310,7 +1310,7 @@ TEST_F(AArch64GISelMITest, TestVectorKnownBitsUMax) {
%copy_umax:_(<2 x s64>) = COPY %umax
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1346,7 +1346,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorUMIN) {
%copy_umin:_(<2 x s8>) = COPY %umin
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1379,7 +1379,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSMAX) {
%copy_smax:_(<2 x s8>) = COPY %smax
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1412,7 +1412,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorSMIN) {
%copy_smin:_(<2 x s8>) = COPY %smin
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1437,7 +1437,7 @@ TEST_F(AArch64GISelMITest, TestVectorInvalidQueries) {
%biggerSized:_(<2 x s32>) = G_SHL %src, %thirty3_splat
%copy2:_(<2 x s32>) = COPY %biggerSized
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
@@ -1479,7 +1479,7 @@ TEST_F(AArch64GISelMITest, TestKnownBitsVectorAssertZext) {
%copy_assert3:_(<2 x s64>) = COPY %assert3
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString);
+ setUp(MIRString);
if (!TM)
return;
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
index ea53f1d2529e..023f69204be2 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
@@ -25,7 +25,7 @@ class DummyGISelObserver : public GISelChangeObserver {
// Test G_ROTL/G_ROTR lowering.
TEST_F(AArch64GISelMITest, LowerRotates) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -78,7 +78,7 @@ TEST_F(AArch64GISelMITest, LowerRotates) {
// Test G_ROTL/G_ROTR non-pow2 lowering.
TEST_F(AArch64GISelMITest, LowerRotatesNonPow2) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -135,7 +135,7 @@ TEST_F(AArch64GISelMITest, LowerRotatesNonPow2) {
// Test vector G_ROTR lowering.
TEST_F(AArch64GISelMITest, LowerRotatesVector) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -182,7 +182,7 @@ TEST_F(AArch64GISelMITest, LowerRotatesVector) {
// Test CTTZ expansion when CTTZ_ZERO_UNDEF is legal or custom,
// in which case it becomes CTTZ_ZERO_UNDEF with select.
TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ0) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -214,7 +214,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ0) {
// CTTZ expansion in terms of CTLZ
TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ1) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -248,7 +248,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ1) {
// CTLZ scalar narrowing
TEST_F(AArch64GISelMITest, NarrowScalarCTLZ) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -283,7 +283,7 @@ TEST_F(AArch64GISelMITest, NarrowScalarCTLZ) {
// CTTZ scalar narrowing
TEST_F(AArch64GISelMITest, NarrowScalarCTTZ) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -318,7 +318,7 @@ TEST_F(AArch64GISelMITest, NarrowScalarCTTZ) {
// CTTZ expansion in terms of CTPOP
TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ2) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -351,7 +351,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ2) {
// CTPOP widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP1) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -385,7 +385,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP1) {
// Test a strange case where the result is wider than the source
TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP2) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -420,7 +420,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP2) {
// CTTZ_ZERO_UNDEF expansion in terms of CTTZ
TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ3) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -447,7 +447,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTTZ3) {
// CTLZ expansion in terms of CTLZ_ZERO_UNDEF
TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ0) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -478,7 +478,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ0) {
// CTLZ expansion in terms of CTLZ_ZERO_UNDEF if the latter is a libcall
TEST_F(AArch64GISelMITest, LowerBitCountingCTLZLibcall) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -509,7 +509,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZLibcall) {
// CTLZ expansion
TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ1) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -550,7 +550,7 @@ TEST_F(AArch64GISelMITest, LowerBitCountingCTLZ1) {
// CTLZ widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTLZ) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -585,7 +585,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTLZ) {
// CTLZ_ZERO_UNDEF widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTLZZeroUndef) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -621,7 +621,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTLZZeroUndef) {
// CTPOP widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -654,7 +654,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTPOP) {
// CTTZ_ZERO_UNDEF widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ_ZERO_UNDEF) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -688,7 +688,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ_ZERO_UNDEF) {
// CTTZ widening.
TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -722,7 +722,7 @@ TEST_F(AArch64GISelMITest, WidenBitCountingCTTZ) {
}
// UADDO widening.
TEST_F(AArch64GISelMITest, WidenUADDO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -761,7 +761,7 @@ TEST_F(AArch64GISelMITest, WidenUADDO) {
// USUBO widening.
TEST_F(AArch64GISelMITest, WidenUSUBO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -800,7 +800,7 @@ TEST_F(AArch64GISelMITest, WidenUSUBO) {
// SADDO widening.
TEST_F(AArch64GISelMITest, WidenSADDO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -839,7 +839,7 @@ TEST_F(AArch64GISelMITest, WidenSADDO) {
// SSUBO widening.
TEST_F(AArch64GISelMITest, WidenSSUBO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -877,7 +877,7 @@ TEST_F(AArch64GISelMITest, WidenSSUBO) {
}
TEST_F(AArch64GISelMITest, WidenUADDE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -917,7 +917,7 @@ TEST_F(AArch64GISelMITest, WidenUADDE) {
}
TEST_F(AArch64GISelMITest, WidenUSUBE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -957,7 +957,7 @@ TEST_F(AArch64GISelMITest, WidenUSUBE) {
}
TEST_F(AArch64GISelMITest, WidenSADDE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -997,7 +997,7 @@ TEST_F(AArch64GISelMITest, WidenSADDE) {
}
TEST_F(AArch64GISelMITest, WidenSSUBE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1037,7 +1037,7 @@ TEST_F(AArch64GISelMITest, WidenSSUBE) {
}
TEST_F(AArch64GISelMITest, NarrowUADDO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1074,7 +1074,7 @@ TEST_F(AArch64GISelMITest, NarrowUADDO) {
}
TEST_F(AArch64GISelMITest, NarrowUSUBO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1111,7 +1111,7 @@ TEST_F(AArch64GISelMITest, NarrowUSUBO) {
}
TEST_F(AArch64GISelMITest, NarrowSADDO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1148,7 +1148,7 @@ TEST_F(AArch64GISelMITest, NarrowSADDO) {
}
TEST_F(AArch64GISelMITest, NarrowSSUBO) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1185,7 +1185,7 @@ TEST_F(AArch64GISelMITest, NarrowSSUBO) {
}
TEST_F(AArch64GISelMITest, NarrowUADDE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1224,7 +1224,7 @@ TEST_F(AArch64GISelMITest, NarrowUADDE) {
}
TEST_F(AArch64GISelMITest, NarrowUSUBE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1263,7 +1263,7 @@ TEST_F(AArch64GISelMITest, NarrowUSUBE) {
}
TEST_F(AArch64GISelMITest, NarrowSADDE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1302,7 +1302,7 @@ TEST_F(AArch64GISelMITest, NarrowSADDE) {
}
TEST_F(AArch64GISelMITest, NarrowSSUBE) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1341,7 +1341,7 @@ TEST_F(AArch64GISelMITest, NarrowSSUBE) {
}
TEST_F(AArch64GISelMITest, FewerElementsAnd) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1396,7 +1396,7 @@ TEST_F(AArch64GISelMITest, FewerElementsAnd) {
}
TEST_F(AArch64GISelMITest, MoreElementsAnd) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1439,7 +1439,7 @@ TEST_F(AArch64GISelMITest, MoreElementsAnd) {
}
TEST_F(AArch64GISelMITest, FewerElementsPhi) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1536,7 +1536,7 @@ TEST_F(AArch64GISelMITest, FewerElementsPhi) {
// FNEG expansion in terms of XOR
TEST_F(AArch64GISelMITest, LowerFNEG) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1584,7 +1584,7 @@ TEST_F(AArch64GISelMITest, LowerFNEG) {
}
TEST_F(AArch64GISelMITest, LowerMinMax) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1671,7 +1671,7 @@ TEST_F(AArch64GISelMITest, LowerMinMax) {
}
TEST_F(AArch64GISelMITest, WidenScalarBuildVector) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1720,7 +1720,7 @@ TEST_F(AArch64GISelMITest, WidenScalarBuildVector) {
}
TEST_F(AArch64GISelMITest, LowerMergeValues) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1825,7 +1825,7 @@ TEST_F(AArch64GISelMITest, LowerMergeValues) {
}
TEST_F(AArch64GISelMITest, WidenScalarMergeValuesPointer) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1864,7 +1864,7 @@ TEST_F(AArch64GISelMITest, WidenScalarMergeValuesPointer) {
}
TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1897,7 +1897,7 @@ TEST_F(AArch64GISelMITest, WidenSEXTINREG) {
}
TEST_F(AArch64GISelMITest, NarrowSEXTINREG) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1930,7 +1930,7 @@ TEST_F(AArch64GISelMITest, NarrowSEXTINREG) {
}
TEST_F(AArch64GISelMITest, NarrowSEXTINREG2) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1964,7 +1964,7 @@ TEST_F(AArch64GISelMITest, NarrowSEXTINREG2) {
}
TEST_F(AArch64GISelMITest, LowerSEXTINREG) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -1996,7 +1996,7 @@ TEST_F(AArch64GISelMITest, LowerSEXTINREG) {
}
TEST_F(AArch64GISelMITest, LibcallFPExt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2035,7 +2035,7 @@ TEST_F(AArch64GISelMITest, LibcallFPExt) {
}
TEST_F(AArch64GISelMITest, LibcallFPTrunc) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2077,7 +2077,7 @@ TEST_F(AArch64GISelMITest, LibcallFPTrunc) {
}
TEST_F(AArch64GISelMITest, LibcallSimple) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2100,7 +2100,7 @@ TEST_F(AArch64GISelMITest, LibcallSimple) {
}
TEST_F(AArch64GISelMITest, LibcallSRem) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2157,7 +2157,7 @@ TEST_F(AArch64GISelMITest, LibcallSRem) {
}
TEST_F(AArch64GISelMITest, LibcallURem) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2214,7 +2214,7 @@ TEST_F(AArch64GISelMITest, LibcallURem) {
}
TEST_F(AArch64GISelMITest, LibcallCtlzZeroUndef) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2267,7 +2267,7 @@ TEST_F(AArch64GISelMITest, LibcallCtlzZeroUndef) {
}
TEST_F(AArch64GISelMITest, LibcallFAdd) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2319,7 +2319,7 @@ TEST_F(AArch64GISelMITest, LibcallFAdd) {
}
TEST_F(AArch64GISelMITest, LibcallFSub) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2371,7 +2371,7 @@ TEST_F(AArch64GISelMITest, LibcallFSub) {
}
TEST_F(AArch64GISelMITest, LibcallFMul) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2423,7 +2423,7 @@ TEST_F(AArch64GISelMITest, LibcallFMul) {
}
TEST_F(AArch64GISelMITest, LibcallFDiv) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2475,7 +2475,7 @@ TEST_F(AArch64GISelMITest, LibcallFDiv) {
}
TEST_F(AArch64GISelMITest, LibcallFExp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2522,7 +2522,7 @@ TEST_F(AArch64GISelMITest, LibcallFExp) {
}
TEST_F(AArch64GISelMITest, LibcallFExp2) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2569,7 +2569,7 @@ TEST_F(AArch64GISelMITest, LibcallFExp2) {
}
TEST_F(AArch64GISelMITest, LibcallFRem) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2616,7 +2616,7 @@ TEST_F(AArch64GISelMITest, LibcallFRem) {
}
TEST_F(AArch64GISelMITest, LibcallFPow) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2663,7 +2663,7 @@ TEST_F(AArch64GISelMITest, LibcallFPow) {
}
TEST_F(AArch64GISelMITest, LibcallFMa) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2711,7 +2711,7 @@ TEST_F(AArch64GISelMITest, LibcallFMa) {
}
TEST_F(AArch64GISelMITest, LibcallFCeil) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2758,7 +2758,7 @@ TEST_F(AArch64GISelMITest, LibcallFCeil) {
}
TEST_F(AArch64GISelMITest, LibcallFFloor) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2805,7 +2805,7 @@ TEST_F(AArch64GISelMITest, LibcallFFloor) {
}
TEST_F(AArch64GISelMITest, LibcallFMinNum) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2855,7 +2855,7 @@ TEST_F(AArch64GISelMITest, LibcallFMinNum) {
}
TEST_F(AArch64GISelMITest, LibcallFMaxNum) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2905,7 +2905,7 @@ TEST_F(AArch64GISelMITest, LibcallFMaxNum) {
}
TEST_F(AArch64GISelMITest, LibcallFSqrt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2952,7 +2952,7 @@ TEST_F(AArch64GISelMITest, LibcallFSqrt) {
}
TEST_F(AArch64GISelMITest, LibcallFRint) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -2999,7 +2999,7 @@ TEST_F(AArch64GISelMITest, LibcallFRint) {
}
TEST_F(AArch64GISelMITest, LibcallFNearbyInt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3049,7 +3049,7 @@ TEST_F(AArch64GISelMITest, LibcallFNearbyInt) {
}
TEST_F(AArch64GISelMITest, NarrowScalarExtract) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3088,7 +3088,7 @@ TEST_F(AArch64GISelMITest, NarrowScalarExtract) {
}
TEST_F(AArch64GISelMITest, LowerInsert) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3189,7 +3189,7 @@ TEST_F(AArch64GISelMITest, LowerInsert) {
// Test lowering of G_FFLOOR
TEST_F(AArch64GISelMITest, LowerFFloor) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3221,7 +3221,7 @@ TEST_F(AArch64GISelMITest, LowerFFloor) {
// Test lowering of G_BSWAP
TEST_F(AArch64GISelMITest, LowerBSWAP) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3263,7 +3263,7 @@ TEST_F(AArch64GISelMITest, LowerBSWAP) {
// Test lowering of G_SDIVREM into G_SDIV and G_SREM
TEST_F(AArch64GISelMITest, LowerSDIVREM) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3294,7 +3294,7 @@ TEST_F(AArch64GISelMITest, LowerSDIVREM) {
// Test lowering of G_UDIVREM into G_UDIV and G_UREM
TEST_F(AArch64GISelMITest, LowerUDIVREM) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3325,7 +3325,7 @@ TEST_F(AArch64GISelMITest, LowerUDIVREM) {
// Test widening of G_UNMERGE_VALUES
TEST_F(AArch64GISelMITest, WidenUnmerge) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3373,7 +3373,7 @@ TEST_F(AArch64GISelMITest, WidenUnmerge) {
}
TEST_F(AArch64GISelMITest, BitcastLoad) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3407,7 +3407,7 @@ TEST_F(AArch64GISelMITest, BitcastLoad) {
}
TEST_F(AArch64GISelMITest, BitcastStore) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3441,7 +3441,7 @@ TEST_F(AArch64GISelMITest, BitcastStore) {
}
TEST_F(AArch64GISelMITest, BitcastSelect) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3488,7 +3488,7 @@ TEST_F(AArch64GISelMITest, BitcastSelect) {
}
TEST_F(AArch64GISelMITest, BitcastBitOps) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3540,7 +3540,7 @@ TEST_F(AArch64GISelMITest, BitcastBitOps) {
}
TEST_F(AArch64GISelMITest, CreateLibcall) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3567,7 +3567,7 @@ TEST_F(AArch64GISelMITest, CreateLibcall) {
// Test narrowing of G_IMPLICIT_DEF
TEST_F(AArch64GISelMITest, NarrowImplicitDef) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3631,7 +3631,7 @@ TEST_F(AArch64GISelMITest, NarrowImplicitDef) {
// Test widening of G_FREEZE
TEST_F(AArch64GISelMITest, WidenFreeze) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3681,7 +3681,7 @@ TEST_F(AArch64GISelMITest, WidenFreeze) {
// Test narrowing of G_FREEZE
TEST_F(AArch64GISelMITest, NarrowFreeze) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3769,7 +3769,7 @@ TEST_F(AArch64GISelMITest, NarrowFreeze) {
// Test fewer elements of G_FREEZE
TEST_F(AArch64GISelMITest, FewerElementsFreeze) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3822,7 +3822,7 @@ TEST_F(AArch64GISelMITest, FewerElementsFreeze) {
// Test more elements of G_FREEZE
TEST_F(AArch64GISelMITest, MoreElementsFreeze) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3858,7 +3858,7 @@ TEST_F(AArch64GISelMITest, MoreElementsFreeze) {
// Test fewer elements of G_INSERT_VECTOR_ELEMENT
TEST_F(AArch64GISelMITest, FewerElementsInsertVectorElt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -3942,7 +3942,7 @@ TEST_F(AArch64GISelMITest, FewerElementsInsertVectorElt) {
// Test widen scalar of G_UNMERGE_VALUES
TEST_F(AArch64GISelMITest, widenScalarUnmerge) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
diff --git a/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp b/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
index 9d40cef78c95..6bcab36f62fb 100644
--- a/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
@@ -58,7 +58,7 @@ TEST_F(AArch64GISelMITest, BasicLegalizerTest) {
%v:_(<2 x s8>) = G_LOAD %vptr:_(p0) :: (load 2, align 1)
$h4 = COPY %v:_(<2 x s8>)
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
+ setUp(MIRString.rtrim(' '));
if (!TM)
return;
@@ -97,7 +97,7 @@ TEST_F(AArch64GISelMITest, UnorderedArtifactCombiningTest) {
%v0_ext:_(s16) = G_ANYEXT %v0:_(s8)
$h4 = COPY %v0_ext:_(s16)
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
+ setUp(MIRString.rtrim(' '));
if (!TM)
return;
@@ -191,7 +191,7 @@ TEST_F(AArch64GISelMITest, UnorderedArtifactCombiningManyCopiesTest) {
$w4 = COPY %v0_zext:_(s32)
$w5 = COPY %v1_sext:_(s32)
)";
- LLVMTargetMachine *TM = createTargetMachineAndModule(MIRString.rtrim(' '));
+ setUp(MIRString.rtrim(' '));
if (!TM)
return;
diff --git a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
index b2cf9653a5b6..daad2f78632b 100644
--- a/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
@@ -10,7 +10,7 @@
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
TEST_F(AArch64GISelMITest, TestBuildConstantFConstant) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -41,7 +41,7 @@ TEST_F(AArch64GISelMITest, TestBuildConstantFConstant) {
#ifndef NDEBUG
TEST_F(AArch64GISelMITest, TestBuildConstantFConstantDeath) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -73,7 +73,7 @@ TEST_F(AArch64GISelMITest, TestBuildConstantFConstantDeath) {
#endif
TEST_F(AArch64GISelMITest, DstOpSrcOp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -99,7 +99,7 @@ TEST_F(AArch64GISelMITest, DstOpSrcOp) {
}
TEST_F(AArch64GISelMITest, BuildUnmerge) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -120,7 +120,7 @@ TEST_F(AArch64GISelMITest, BuildUnmerge) {
}
TEST_F(AArch64GISelMITest, TestBuildFPInsts) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -156,7 +156,7 @@ TEST_F(AArch64GISelMITest, TestBuildFPInsts) {
}
TEST_F(AArch64GISelMITest, BuildIntrinsic) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -185,7 +185,7 @@ TEST_F(AArch64GISelMITest, BuildIntrinsic) {
}
TEST_F(AArch64GISelMITest, BuildXor) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -214,7 +214,7 @@ TEST_F(AArch64GISelMITest, BuildXor) {
}
TEST_F(AArch64GISelMITest, BuildBitCounts) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -242,7 +242,7 @@ TEST_F(AArch64GISelMITest, BuildBitCounts) {
}
TEST_F(AArch64GISelMITest, BuildCasts) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -267,7 +267,7 @@ TEST_F(AArch64GISelMITest, BuildCasts) {
}
TEST_F(AArch64GISelMITest, BuildMinMaxAbs) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -295,7 +295,7 @@ TEST_F(AArch64GISelMITest, BuildMinMaxAbs) {
}
TEST_F(AArch64GISelMITest, BuildAtomicRMW) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -325,7 +325,7 @@ TEST_F(AArch64GISelMITest, BuildAtomicRMW) {
}
TEST_F(AArch64GISelMITest, BuildMerge) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -364,7 +364,7 @@ TEST_F(AArch64GISelMITest, BuildMerge) {
}
TEST_F(AArch64GISelMITest, BuildAddoSubo) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -400,7 +400,7 @@ TEST_F(AArch64GISelMITest, BuildAddoSubo) {
}
TEST_F(AArch64GISelMITest, BuildBitfieldExtract) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
LLT S64 = LLT::scalar(64);
diff --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
index f27daa81bc79..8a5d8e783399 100644
--- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
@@ -31,7 +31,7 @@ using namespace MIPatternMatch;
namespace {
TEST_F(AArch64GISelMITest, MatchIntConstant) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
auto MIBCst = B.buildConstant(LLT::scalar(64), 42);
@@ -42,7 +42,7 @@ TEST_F(AArch64GISelMITest, MatchIntConstant) {
}
TEST_F(AArch64GISelMITest, MatchBinaryOp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
LLT s32 = LLT::scalar(32);
@@ -156,7 +156,7 @@ TEST_F(AArch64GISelMITest, MatchBinaryOp) {
}
TEST_F(AArch64GISelMITest, MatchICmp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -181,7 +181,7 @@ TEST_F(AArch64GISelMITest, MatchICmp) {
}
TEST_F(AArch64GISelMITest, MatchFCmp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -206,7 +206,7 @@ TEST_F(AArch64GISelMITest, MatchFCmp) {
}
TEST_F(AArch64GISelMITest, MatchFPUnaryOp) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -268,7 +268,7 @@ TEST_F(AArch64GISelMITest, MatchFPUnaryOp) {
}
TEST_F(AArch64GISelMITest, MatchExtendsTrunc) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -315,7 +315,7 @@ TEST_F(AArch64GISelMITest, MatchExtendsTrunc) {
}
TEST_F(AArch64GISelMITest, MatchSpecificType) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -352,7 +352,7 @@ TEST_F(AArch64GISelMITest, MatchSpecificType) {
}
TEST_F(AArch64GISelMITest, MatchCombinators) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -386,7 +386,7 @@ TEST_F(AArch64GISelMITest, MatchCombinators) {
}
TEST_F(AArch64GISelMITest, MatchMiscellaneous) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -413,7 +413,7 @@ TEST_F(AArch64GISelMITest, MatchMiscellaneous) {
}
TEST_F(AArch64GISelMITest, MatchSpecificConstant) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -435,7 +435,7 @@ TEST_F(AArch64GISelMITest, MatchSpecificConstant) {
}
TEST_F(AArch64GISelMITest, MatchZeroInt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
auto Zero = B.buildConstant(LLT::scalar(64), 0);
@@ -446,7 +446,7 @@ TEST_F(AArch64GISelMITest, MatchZeroInt) {
}
TEST_F(AArch64GISelMITest, MatchAllOnesInt) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
auto AllOnes = B.buildConstant(LLT::scalar(64), -1);
@@ -457,7 +457,7 @@ TEST_F(AArch64GISelMITest, MatchAllOnesInt) {
}
TEST_F(AArch64GISelMITest, MatchNeg) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
@@ -489,7 +489,7 @@ TEST_F(AArch64GISelMITest, MatchNeg) {
}
TEST_F(AArch64GISelMITest, MatchNot) {
- LLVMTargetMachine *TM = createTargetMachineAndModule();
+ setUp();
if (!TM)
return;
More information about the llvm-commits
mailing list