[PATCH] D99236: [RISCV] Turn splat shuffles of vector loads into scalar loads and a splat.

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added a comment.

One could argue that this introduces coupling between the scalar register bank and the vector register bank. But I presume the simpler scalar load makes up for that loss of decoupling.

Reassuring myself here: VectorCombine cannot do this for scalables, can it?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99236/new/

https://reviews.llvm.org/D99236