[PATCH] D99637: [RISCV] Add isel patterns to select vsub_vx intrinsic to vadd.vi if the immediate is small enough.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 334341.
craig.topper added a comment.
Herald added a subscriber: hiraditya.

Upload the patterns too.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99637/new/

https://reviews.llvm.org/D99637

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll

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