[PATCH] D99637: [RISCV] Add isel patterns to select vsub_vx intrinsic to vadd.vi if the immediate is small enough.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Also modify the simm5_plus1 check because Imm-1 is UB if Imm happens
to be INT64_MIN. I don't think the compiler would optimize based on that in this
usage, but it could fail UBSan or -fwrapv.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99637

Files:
  llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll

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