[PATCH] D99574: [ARM] [COFF] Properly produce cross-section relative relocations

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo created this revision.
mstorsjo added reviewers: rnk, efriedma, compnerd.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
mstorsjo requested review of this revision.
Herald added a project: LLVM.

Same as D99572 <https://reviews.llvm.org/D99572> but for ARM.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99574

Files:
  llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
  llvm/test/MC/ARM/coff-relocations.s


Index: llvm/test/MC/ARM/coff-relocations.s
===================================================================
--- llvm/test/MC/ARM/coff-relocations.s
+++ llvm/test/MC/ARM/coff-relocations.s
@@ -4,6 +4,9 @@
 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
 @ RUN:   | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-ENCODING
 
+@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
+@ RUN:   | llvm-objdump -s - | FileCheck %s --check-prefix=CHECK-DATA
+
 	.syntax unified
 	.text
 	.thumb
@@ -87,6 +90,11 @@
 .Lsecrel:
 	.long target(secrel32)
 
+	.section .rdata, "dr"
+.Ltable:
+	.word addr32nb - .Ltable
+	.word secrel - .Ltable
+
 @ CHECK-ENCODING-LABEL: <secrel>:
 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
 @ CHECK-ENCODING-NEXT: bx r0
@@ -105,5 +113,11 @@
 @ CHECK-RELOCATION:     0x2C IMAGE_REL_ARM_ADDR32NB
 @ CHECK-RELOCATION:     0x38 IMAGE_REL_ARM_SECREL
 @ CHECK-RELOCATION:   }
+@ CHECK-RELOCATION:   Section (4) .rdata {
+@ CHECK-RELOCATION:     0x0 IMAGE_REL_ARM_REL32
+@ CHECK-RELOCATION:     0x4 IMAGE_REL_ARM_REL32
+@ CHECK-RELOCATION:   }
 @ CHECK-RELOCATION: ]
 
+@ CHECK-DATA: Contents of section .rdata:
+@ CHECK-DATA-NEXT: 0000 00000000 04000000
Index: llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
+++ llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
@@ -10,6 +10,7 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/BinaryFormat/COFF.h"
 #include "llvm/MC/MCAsmBackend.h"
+#include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCFixup.h"
 #include "llvm/MC/MCFixupKindInfo.h"
@@ -53,7 +54,17 @@
   MCSymbolRefExpr::VariantKind Modifier =
     Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
 
-  switch (static_cast<unsigned>(Fixup.getKind())) {
+  unsigned FixupKind = Fixup.getKind();
+  if (IsCrossSection) {
+    if (FixupKind != FK_Data_4) {
+      Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression");
+      return COFF::IMAGE_REL_ARM_ADDR32;
+    }
+    FixupKind = FK_PCRel_4;
+  }
+
+
+  switch (FixupKind) {
   default: {
     const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
     report_fatal_error(Twine("unsupported relocation type: ") + Info.Name);
@@ -67,6 +78,8 @@
     default:
       return COFF::IMAGE_REL_ARM_ADDR32;
     }
+  case FK_PCRel_4:
+    return COFF::IMAGE_REL_ARM_REL32;
   case FK_SecRel_2:
     return COFF::IMAGE_REL_ARM_SECTION;
   case FK_SecRel_4:


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