[PATCH] D99384: [AArch64] Avoid SCALAR_TO_VECTOR for single FP constant vector.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 333589.
fhahn added a comment.

Updated to use isIntOrFPConstant (D99428 <https://reviews.llvm.org/D99428>) and removed unused pointer argument from test. Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99384/new/

https://reviews.llvm.org/D99384

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/arm64-build-vector.ll


Index: llvm/test/CodeGen/AArch64/arm64-build-vector.ll
===================================================================
--- llvm/test/CodeGen/AArch64/arm64-build-vector.ll
+++ llvm/test/CodeGen/AArch64/arm64-build-vector.ll
@@ -88,3 +88,20 @@
   %add = fadd <1 x double> %arg, <double 1.0>
   ret <1 x double> %add
 }
+
+; Make sure BUILD_VECTOR does not get stuck in a loop trying to convert a
+; single element FP vector constant from a scalar to vector.
+define <1 x double> @convert_single_fp_vector_constant(i1 %cmp) {
+; CHECK-LABEL: convert_single_fp_vector_constant:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    tst w0, #0x1
+; CHECK-NEXT:    mov x8, #4607182418800017408
+; CHECK-NEXT:    csetm x9, ne
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    fmov d1, x9
+; CHECK-NEXT:    and.8b v0, v0, v1
+; CHECK-NEXT:    ret
+entry:
+  %sel = select i1 %cmp, <1 x double> <double 1.000000e+00>, <1 x double> zeroinitializer
+  ret <1 x double> %sel
+}
Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -9708,7 +9708,7 @@
   // Convert BUILD_VECTOR where all elements but the lowest are undef into
   // SCALAR_TO_VECTOR, except for when we have a single-element constant vector
   // as SimplifyDemandedBits will just turn that back into BUILD_VECTOR.
-  if (isOnlyLowElement && !(NumElts == 1 && isa<ConstantSDNode>(Value))) {
+  if (isOnlyLowElement && !(NumElts == 1 && isIntOrFPConstant(Value))) {
     LLVM_DEBUG(dbgs() << "LowerBUILD_VECTOR: only low element used, creating 1 "
                          "SCALAR_TO_VECTOR node\n");
     return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value);


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