[PATCH] D98939: [SelectionDAG][AArch64][SVE] Perform SETCC condition legalization in LegalizeVectorOps

[Bradley Smith via Phabricator via llvm-commits]

bsmith updated this revision to Diff 333270.
bsmith marked 5 inline comments as done.
bsmith added a comment.

- Remove unfinished case for SELECT_CC, this isn't needed currently for SVE, can be added later if/when needed.
- Tidy up code in `VectorLegalizer::ExpandSETCC`.
- Fix bogus test names.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98939/new/

https://reviews.llvm.org/D98939

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll
  llvm/test/CodeGen/PowerPC/vsx.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll

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